The PCI-SIG has announced this week that PCI Express 3.0 will carry a bit rate of 8 gigatransfers per second. The specification will be backwards-compatible with existing implementations. A final specification is due in 2009. The press release said,
“The data shows that 8GT/s can be manufactured in mainstream silicon process technology, and can be deployed with existing low-cost materials and infrastructure, while maintaining full mechanical compatibility and with negligible impact to the PCIe protocol stack.
The 8GT/s bit rate represents a doubling of the delivered bandwidth by removing the requirement for the 8b/10b encoding scheme supported in prior versions of PCIe architecture, which imposed a 20 percent overhead on the raw bit rate.”
The PCIe 3.0 specification will introduce a number of optimizations for enhanced signaling and data integrity, including transmitter and receiver equalization, PLL improvements, clock data recovery, and channel enhancements for currently supported topologies.